Texas Instruments dual negative-edge JK flip-flop IC with independent set and reset in a 16-pin DIP package for through-hole PCB assembly.
Texas Instruments Dual Negative-Edge JK Flip-Flop IC is a dual negative-edge-triggered J-K flip-flop with independent set and reset functions, providing controlled digital logic in a 16-pin DIP package.
Overview
Each flip-flop features independent J, K, Set, Reset and Clock inputs, along with complementary Q and Q-bar outputs. State changes occur on the negative-going transition of the clock pulse, and asynchronous set and reset are accomplished via low-level inputs. The device is built using advanced silicon-gate CMOS technology, delivering high-speed operation equivalent to LSTTL components while maintaining the low power consumption associated with CMOS integrated circuits. It can drive up to 10 LSTTL loads.
Key Features
Package and Mounting
This integrated circuit is supplied in a standard 16-pin Dual In-line Package (DIP), suitable for through-hole PCB assembly. Its pin-for-pin compatibility with LS logic makes it straightforward to upgrade or replace devices in existing designs.
Dimensions and Weight
Width 3.3, depth 1.5 and height 4.3, with a weight of 1.678 gm.
Choose this JK flip-flop IC for digital logic applications that require negative-edge-triggered control with independent set and reset in a through-hole 16-pin DIP package.
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